With the continuous development of the miniaturization and the complexity of semiconductor processes, semiconductor devices have become easier to be affected by various defects and impurities. The failures of individual lines, diodes and/or transistors often create defects in an entire chip. To solve such a problem, fuses are often included in integrated circuits (ICs) to increase the yield of IC products.
Currently, the commonly used fuse structures in ICs are electrically programmable fuse (Efuse) structures. The Efuse structures have a relatively high compatibility with the complementary metal oxide semiconductor (CMOS) structures. Further, the operation of the Efuse structures is relatively simple; the volume of the Efuse structures is relatively small; and the flexibility of the Efuse structures is relatively high. Thus, the Efuse structures are widely used in the ICs. For example, the Efuse structures can be used as one-time programmable (OTP) memory.
However, the performance of the existing Efuse structures needs further improvements. The disclosed methods and semiconductor structures are directed to solve one or more problems set forth above and other problems in the art.